[isabelle] FMCAD'08: Early registration ends Oct. 16th (Call for Participation)

Please note that early registration ends Oct. 16th, and the hotel registration deadline is Oct. 18th.

                       CALL FOR PARTICIPATION

                             FMCAD 2008
International Conference on Formal Methods in Computer-Aided Design

                        November 17-20, 2008
                 Embassy Suites Portland--Downtown
                          Portland, Oregon


Important Dates
 Early Registration Deadline: October 16, 2008
 Hotel Registration Deadline: October 18, 2008

Conference Overview
 FMCAD 2008 is the eighth in a series of conferences on the theory
 and application of formal methods in hardware and system design and
 verification. In 2005, the bi-annual FMCAD and sister conference
 CHARME decided to merge to form an annual conference with a unified
 community. The resulting unified FMCAD provides a leading
 international forum to researchers and practitioners in academia and
 industry for presenting and discussing groundbreaking methods,
 technologies, theoretical results, and tools for formally reasoning
 about computing systems, as well as open challenges therein.

Local Information
 The Conference will be held at the Embassy Suites (Downtown) in
 Portland, Oregon.  We have negotiated a special rate with the hotel
 for conference attendees.  Please book early to secure the reduced
 rate.  For details, please see the conference web page.  A dinner
 cruise on the Willamette River is planned.

Technical Program
 The technical program is available at the conference web page.  It
 includes 2 invited keynotes, 4 invited tutorials, 24 regular papers,
 4 short papers, and 2 panels.

 o Ken McMillan (Cadence): Interpolation -- Theory and Applications
 o Carl Seger (Intel): Formal Methods and Physical Design: Match Made
   in Heaven or Fools' Paradise?

 o Kevin Jones (Rambus): Analog and Mixed Signal Verification: The
   State of the Art and some Open Problems
 o Moshe Levinger (IBM): Building a Bridge: From Pre-Silicon
   Verification to Post-Silicon Validation
 o Byron Cook (Microsoft): Computing Bounds on Space and Time for
   Hardware Compilation.
 o David Hardin (Rockwell Collins): Considerations in the Design and
   Verification of Microprocessors for Safety-Critical and
   Security-Critical Applications.

 o High Level Design and ESL: Who Cares?
 o The Future of Formal: Academic, IC, EDA, and Software Perspectives

        Sponsored by: IEEE CEDA
 In cooperation with: ACM SIGDA
   Financial support: Cadence, Galois, IBM, Intel, NEC, Synopsys


Galois, Inc.
<http://www.cs.indiana.edu/~lepike/> (publications, etc.)

Phone: +1 503.626.6616 ext. 135
Fax: +1 503.350.0833

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