[isabelle] DATE 2018 Formal Methods and Verification Track (D4)
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- Subject: [isabelle] DATE 2018 Formal Methods and Verification Track (D4)
- From: "Schmaltz, J." <j.schmaltz at tue.nl>
- Date: Mon, 17 Jul 2017 12:05:55 +0000
- Accept-language: en-US
- Cc: "biere at jku.at" <biere at jku.at>, "Schmaltz, J." <j.schmaltz at tue.nl>, "scholl at informatik.uni-freiburg.de" <scholl at informatik.uni-freiburg.de>
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- Thread-topic: DATE 2018 Formal Methods and Verification Track (D4)
****** DATE 2018 — Call for Papers — Topic D4 Formal Methods and Verification *******
Design Methods and Tools Track @ DATE 2018
Dresden, Germany - March 19-23, 2018
- Abstract : Sunday, September 10, 2017 23:59:59 CET
- Full paper: Sunday, September 17, 2017 23:59:59 CET.
The 21st DATE conference and exhibition is the main European event bringing together designers and design automation users, researchers and vendors,
as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems.
DATE puts strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware and embedded systems, and embedded software.
The five-day event consists of a conference with plenary invited papers, regular papers, panels, hot-topic sessions, tutorials and workshops,
two special focus days and a track for executives. The scientific conference is complemented by a commercial exhibition showing the state-of-the-art
in design and test tools, methodologies, IP and design services, reconfigurable and other hardware platforms, embedded software, and (industrial) design experiences
from different application domains, e.g. automotive, wireless, telecom and multimedia applications. The organisation of user group meetings, fringe meetings,
a university booth, a PhD forum, vendor presentations and social events offers a wide variety of extra opportunities to meet and exchange information on relevant issues
for the design and test community. Special space will also be allocated for EU-funded projects to show their results.
The conference addresses all aspects of research into technologies for electronic and (embedded) systems engineering.
It covers the design process, test, and tools for design automation of electronic products ranging from integrated circuits to distributed large-scale systems.
This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures
for challenging application fields such as telecom, wireless communications, multimedia, healthcare and automotive systems.
Persons involved in innovative industrial designs are particularly encouraged to submit papers to foster the feedback from design to research.
Panels, hot-topic sessions and embedded tutorials highlight and inform about emerging topics.
The Design Methods and Tools track addresses design automation, design tools and hardware architectures for electronic and embedded systems.
The emphasis is on methods, algorithms, and tools related to the use of computers in designing complete systems.
The track’s focus includes significant improvements on existing design methods and tools as well as forward-looking approaches to model
and design future system architectures, design flows, and environments.
The Formal Methods and Verification topic (D4) is one of the fourteen topics foreseen in the Design Methods and Tools Track.
The Formal Methods and Verification topic (D4) is devoted to the presentation and discussion of state-of-the-art advances in the theory and practice of
formal verification methods. Topics of interest include, but are not limited to:
- Formal verification and specification techniques, including equivalence checking, model checking, symbolic simulation, theorem proving,
abstraction and refinement techniques, decomposition techniques and compositional reasoning
- Core algorithmic technologies supporting formal verification such as SAT, BDD, and SMT techniques
- Formal verification of hardware (including IPs, SoCs, and cores), software, hardware / software systems, timed and hybrid systems
- Semi-formal verification techniques
- Integration of verification into design flows
- Challenges of multi-cores, both as verification targets and as verification host platforms
- Formal synthesis
- Applications of formal and semi-formal techniques to asynchronous designs, analog and mixed-signal designs,
power modelling and analysis, hardware and software security, etc.
TOPIC TECHNICAL COMMITTEE
Armin Biere, Universitaet Linz, AT (co-chair)
Gianpiero Cabodi, Politecnico di Torino, IT
Alessandro Cimatti, Fondazione Bruno Kessler - Center for Information technology, IT,
Julien Schmaltz, Eindhoven University of Technology, NL
Christoph Scholl, University Freiburg, DE (chair)
Daryl Stewart, ARM, GB
Submission instructions can be found on the conference web page: www.date-conference.com
Papers can be submitted either as Scientific Papers for Oral Presentation or as
Scientific Papers for Interactive Presentation.
Oral presentations require novel and complete research work supported by experimental results.
They will be evaluated with regard to their suitability for the conference, originality, and technical soundness.
Accepted papers will be published in the conference proceedings (max six pages) and will be presented in
either 30-minute ("long") or 15-minute ("short") slots in the conference program in front of an audience.
The Program Committee reserves the right to reorient Oral-Presentation papers to Interactive-Presentation, to obtain the most suitable presentation format.
Interactive presentations are expected to articulate emerging and future design,
verification and test problems including work in progress and identify open problems that merit innovative future research.
Accepted papers will be published in the conference proceedings (max four pages) and will be presented in a face-to-face discussion area.
Presenters are required to prepare a poster (up to A0 format) to help the discussion.
The accepted file format is PDF.
Submissions should be formatted as close as possible to the final format:
A4 or letter pages, double column, single spaced, Times or equivalent font of minimum 10pt
(templates are available on the DATE Web site for your convenience).
To permit blind review, manuscripts should not include the author names nor affiliations.
Manuscripts not in line with the above rules might be discarded.
Deadlines: The deadline to submit papers is Sunday, September 10, 2017 23:59:59 CET. For a paper to be considered a valid submission, at least a title, abstract,
and the complete list of authors (cannot be modified after Sunday, September 10, 2017 23:59:59 CET) should be submitted by this date.
The full paper can be submitted at the same time or later, but must be uploaded at the latest by Sunday, September 17, 2017 23:59:59 CET.
Otherwise the initial submission will be automatically withdrawn. Please note that there will not be any additional deadline extensions beyond Sunday, September 17, 2017 23:59:59 CET.
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